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FADC emulator

The FADC emulator is a 6U-VME module connected to P-PCI via 32-bit LVDS parallel interface. It emulates a real FADC while the emulator was developed by KEK. The firmware is different from that of the real FADC, which was developed by Vienna. The following three figures shows timing infomration at 1536-longwords (6144-bytes) transfers.

The Figure gif shows a timing information of a transfer with 1536 longword, which is a overall figure.

 
Figure: Overall timing inforamtion of a 1536-longword transfer  

The Figure gif shows a part of the starting timing information.

 
Figure: Starting timing information of a 1536-longword transfer  

The Figure gif shows a part of the ending timing information.

 
Figure: Ending timing information of a 1536-longword transfer  

The event size is 1536 longwords. Thus, the emulator sends data of 1536 longword as an event. If PC reads data of 1533 longwords as a block transfer, what happens? The emulator will deassert XREQUEST if new event does not come after sending an event data. The emulator will keep to assert XREQUEST if new event come during sending data to PC. The behavior depends on the trigger rate. The emulator sends data of 1536 longwords and then PC reads data of 1533 longwords. The data of 1 or 2 longwords remains in FIFO of P-PCI because the emulator will deassert XVALID with delaying 1 or 2 clock after receiving the deassertion of XENABLE. And the emulator may not send all of data and then keep to deassert XVALID with asserting XREQUEST. PC will try to read next data as soon as possible after reading the previous one. On the other hand, the emulator will wait for a trigger of next event. When PC read the next data, the emulator does not send data of new event, but sends the remainder of previous event. PC will read data in FIFO of P-PCI and data of the remainder sent from the emulator. As the result, PC reads data of 3 longwords as the next block transfer. The Figure gif shows a snapshot of 3 longword transfer. The block transfer terminates because of deassertion of XREQUEST.

 
Figure: 3 longword transfer  

If the trigger rate is much higher than 1 Hz such as a few MHz, the emulator will keep to assert XREQUEST because new event will come during sending data to PC. In this case, PC will continue to read data of 1533 longwords as a block transfer.

The Figure gif shows a snapshot of 1533 longword transfer.

 
Figure: 1533 longword transfer  



next up previous contents
Next: Operation Up: Link to FADC Previous: real FADC



Yoshiji Yasu
2002年08月06日 18時03分20秒