/*
 * ppci.h : Linux driver for PCI parallel interfaces driver based on TTL 
 *          and LVDS called Fird P-PCI and P-PCI-LV, respectively.
 * Copyright 2001 by Yoshiji Yasu, <Yoshiji.YASU@kek.jp>.
 *
 * This progam is free software; you can redistribute it and/or
 * modify it.
 *
 * version: 0.97 19-Jul-2002, Yoshiji.YASU@kek.jp, 
 *          http://www-online.kek.jp/~yasu/BELLE/ppci.html
 */

#define PCI_VENDOR_ID_PPCI 0x8642
#define PCI_DEVICE_ID_PPCI 0x0630
#define PPCI_MAJOR 70
#define CARD_NAME "ppci"
//#define PPCI_TIMEOUT 500 // 5 seconds for time out
#define PPCI_TIMEOUT 6000
#define PPCIIOC_RESET           _IOWR('p', 1, int)
#define PPCIIOC_PUT_DATA        _IOWR('p', 2, int)
#define PPCIIOC_GET_DATA        _IOWR('p', 3, int)
#define PPCIIOC_RELEASE_CONTROL _IO('p', 4)
#define PPCIIOC_DUMP_REGISTERS  _IOWR('p', 5, struct ppci)
#define PPCIIOC_FIFO_CLEAR      _IO('p', 6)

struct ppci {
  unsigned int data;    /* Output register for External bus */
  unsigned int led;     /* LED register */
  unsigned int sw;      /* Switch Register */
  unsigned int address; /* Transfer address register */
  unsigned int length;  /* Transfer cout register */
  unsigned int mode;    /* Mode register */
  unsigned int status;  /* Status register */
  unsigned int dummy;
  unsigned int retlen;  /* Actual transfer count */
  unsigned int fifolen; /* Size of data in FIFO */
};

#define bit0    0x00000001
#define bit1    0x00000002
#define bit2    0x00000004
#define bit3    0x00000008
#define bit4    0x00000010
#define bit5    0x00000020
#define bit6    0x00000040
#define bit7    0x00000080
#define bit8    0x00000100
#define bit9    0x00000200
#define bit10   0x00000400
#define bit11   0x00000800
#define bit12   0x00001000
#define bit13   0x00002000
#define bit14   0x00004000
#define bit15   0x00008000
#define bit16   0x00010000
#define bit17   0x00020000
#define bit18   0x00040000
#define bit19   0x00080000
#define bit20   0x00100000
#define bit21   0x00200000
#define bit22   0x00400000
#define bit23   0x00800000
#define bit24   0x01000000
#define bit25   0x02000000
#define bit26   0x04000000
#define bit27   0x08000000
#define bit28   0x10000000
#define bit29   0x20000000
#define bit30   0x40000000
#define bit31   0x80000000

/* Registers offset */
#define REG_DATA        0x00 /* Output register for External bus */
#define REG_LED         0x04 /* LED register */
#define REG_SW          0x08 /* Switch Register */
#define REG_ADDRESS     0x0c /* Transfer address register */
#define REG_LENGTH      0x10 /* Transfer cout register */
#define REG_MODE        0x14 /* Mode register */
#define REG_STATUS      0x18 /* Status register */
#define REG_RETLEN      0x20 /* Actual transfer count register */
#define REG_FIFOLEN     0x24 /* Size of actual data in FIFO */

/* Output register field */
/* D31..D0 : input/output in positive logic for External bus */

/* LED register field */
/* D31..D8 : no meaning 
   D7 ..D0 : output to LED : Turn on LED if 1
*/

/* Switch Register field */
/* D31..D8 : no meaning
   D7 ..D0 : input from Switch register : 1 if SW is on.
             D0 <-> SW1 .. D7 <->SW8
*/

/* Transfer address register field */
/* D31..D0 : physical address of data buffer in PC at Master transfer 
   lower 2 bits(bit0 and bit1) are always zero. Double-word unit
*/

/* Transfer cout register field */
/* D31..D0 : transfer byte count
   lower 2 bits(bit0 and bit1) are always zero. double-word unit
*/

/* Mode register field */
#define MODE_DIR0    bit0 /* D7..D0 is for output if 1,otherwise input */
#define MODE_DIR1    bit1 /* D15..D8 is for output if 1,otherwise input */
#define MODE_DIR2    bit2 /* D23..D16 is for output if 1,otherwise input */
#define MODE_DIR3    bit3 /* D31..D24 is for output if 1,otherwise input */
#define MODE_DIR     bit6 /* external bus direction : 0:exteral->PC, otherwise pc->external */
#define MODE_PRV     bit7 /* control right : this board if 0, otherwise external */
#define MODE_RUNMOD  bit8  /* target mode if 0, otherwise master(block) mode */
#define MODE_ENDMSK  bit16 /* disable Done interrupt if 1, enable if otherwise */
#define MODE_STPMSK  bit17 /* disable Force done interrupt if 1, enable if otherwise */
#define MODE_RSTTMSK bit18 /* disable initiation request interrupt if 1, enable if otherwise */
#define MODE_INTCLR  bit19 /* clear interrupt source if 1 */
#define MODE_FIFOCLR  bit24 /* clear interrupt source if 1 */
#define MODE_MSTSTT  bit31 /* make run as bus master if 1 */


/* Status register field */
#define STATUS_VALID    bit0 /* xVALID signal : active if 1 */
#define STATUS_ENABLE   bit1 /* xENABLE signal : active if 1 */
#define STATUS_READY    bit2 /* xREADY signal : active if 1 */
#define STATUS_REQUEST  bit3 /* xREQUEST signal : active if 1 */
#define STATUS_B_SENSE  bit5 /* option board exists if 0 */
#define STATUS_DIR      bit6 /* if control right is on, output if 1
                                if control right is off, input if 1
			     */
#define STATUS_PRV      bit7 /* if this board gets control right, 1 */
#define STATUS_RUNMOD   bit8 /* 0 in target mode, 1 in master mode */
#define STATUS_ENDINT   bit16 /* Done interrupt exists if 1 */
#define STATUS_STPINT   bit17 /* Force done interrupt exists if 1 */
#define STATUS_RSTTINT  bit18 /* initiation request interrupt exists if 1 */
#define STATUS_INTCLR   bit19 /* clear interrupt source if 1 */
#define STATUS_MSTBSY   bit31 /* 1 in execution of master, 0 in stop state */